aCoral架构图
2023-04-14 14:24:28 68 举报aCoral架构图
作者其他创作
大纲/内容
LWIP
DriverLevel
ADC
DDR
ARM9
Infrared
NN Runtime Lib
Interruption
Semaphore
……
TCP
IPC
SD Card
MPU
RV32/64
ARP
CAN
DNS
Global Queue
FAT32
Excecution Model
Acceleration
NFS
Programming Model
KernelLevel
Mutex
Qt
WIFI
Platform Model
Result Handle
......
File System
Application-Oriented Device Module
Thread
Architecture
STM32
pthread
Application
DSP
CACHE
Multi I/O
Module Inference
DDS
珊瑚aCoral系统架构图
HardwarelLevel
YAFFS
EDF
Flash
ApplicationLevel
aCoral-I Kernel
UDP
NTC
Admission Control
Ethernet
PWM
Memory Model
GPIO
Module Unload
Timer
DAC
Shared Resouce
FPGA
Mixed Schedule
ICMP
Motor
Optional Parts
Time Trace
POSIX
Gyro
Power Management
Iron Shoe
Table Schedule
Micro-ROS
IPI
SPI
semaphore
RMS
Debug Log
Standard Device Module
Memory
DHCP
sched
I2C
Queue
MiddlewareLevel
Lora
NN APP
aCoral-cl
Ultrasonic
MMU
RTC
APILevel
USB
Module load
aCoral-II Kernel
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